High-efficiency power amplifier (PA) design is increasingly becoming an integral part of wireless communication systems. The cellular base station market is slowly transitioning to gallium-nitride (GaN) based radio frequency (RF) products that are expected to be suitable for fifth generation (5G) communications. Improvement of the final-stage PA performance characteristics such as gain, output power, linearity, and DC-RF conversion efficiency remains a focus for researchers now within the context of stringent massive multiple input multiple output (MIMO) 5G specifications.
In many implementations that employ Doherty PA circuits or other multi-path PA circuits, the physical die area is of key concern, as power transistor products included in commercial wireless infrastructure systems have become increasingly cost-sensitive as well as area/volume/weight sensitive. With GaN technology, this is particularly important as the technology per square millimeter is significantly more expensive than that of silicon (Si) or other III-V based semiconductors. Because GaN is not manufactured on a native substrate, lattice mismatch prevents growing wafer size beyond approximately six inches in diameter. Accordingly, each GaN wafer tends to yield fewer power transistor die than are typically achievable using Si wafer technology.
For at least these reasons, therefore, it would be advantageous if one or more improved electrical circuits, systems, or methods of operating, manufacturing, or otherwise implementing same, and particularly one or more improved PA circuits, PA systems, or related PA methods, could be developed in which improvements relating to any one or more of the above concerns, or one or more other concerns, could be achieved.